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DSP

Projects > Project Overviews

Here are some DSP projects that Templetronics expertise has successfully both directly designed and contributed to in the past. Our expertise has undertaken the base hardware design as well as the internal DSP design (algorithms & digital filter).



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Processing Engine for Medical (FPGA)

Project: Data acqusition and processing engine using an FPGA
Description:
FPGA implemented design for a medical system in a theatre based surgical monitor incorporating: decimation & IIR digital, deconvolution filters designed, as well as peripheral interfaces (Pipeline ADC) and data transport interfaces and implemented in VHDL. FPGA target system: Xilinx Artix 7.

This algorithm set, plus the electronics system from sensor and signal conditioning, was modeled extensively in MATLAB/Simulink using existing and custom models to evaluate performance, and pre implementation/early evaluation of the intended architecture. Exploring the trade-offs, intended filter architectures and architectural performance provided early visibility of success, and confirmation that assumptions made on structures were sound. The additional benefit was to evaluate noise performance on the exact implementation, and see that the intended architecture was noise tolerant. Using simple filter topologies, in both the analogue and digital domains, yielded more than sufficient performance of noise rejection. Downstream algorithms aided smoothing and very satisfactory performance.

An additional feature of this method is to evaluate digital implementation performance as well as obtain results to aid verification. Co-simulation across domains is now very possible due to EDA power.

For more details , see the Embedded Systems project page, and the Digital ASIC & FPGA for more information.

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Decimation & Sync Filter (FPGA)

Project: Digital multi-decimation and sync filter targeted to FPGA
Description:
FPGA implemented design for an advanced vibration monitoring system, for use with industrial machines (multiple end-users of the system) incorporating: FIR decimation & digital sync filters designed and implemented in VHDL
FPGA target system: Xilinx Virtex5

For more details , see the Embedded Systems project page, the Digital ASIC & FPGA and Mixed Signal projects page for more information.

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Hardware Multiprocessor DSP System

Project: Multi-processor vibration monitoring and analysis system
Description:
Dual processor DSP system design (Freescale PPC and TI DSP platforms) containing frequency analysis signal processing algorithms and alarms limit/detections and historical data storage.

For more details , see the Embedded Systems project page, the Digital ASIC & FPGA and Mixed Signal projects page for more information.

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Digital Motor Control Algorithms (brushless DC motor)

Project: Brushless DC-motor controller and associated algorithms
Description:
Digitally controlled brush-less DC motor control system for the Airbus A380 primary and secondary flight surfaces. Key DSP elements of the project (common to both phases):
CORDIC computer based resolver-to-digital converter design in VHDL; custom DSP and mathematical algorithms & IIR filter design in fixed point arithmetic 2ís complement and unsigned implementation

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For more details , see the Embedded Systems project page, the Digital ASIC & FPGA and Mixed Signal projects page for more information.

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DAS & Vibration Frequency Analysis Design

Project: Data acquisition & frequency analysis hardware & firmware system
Description:
Our design expertise implemented a combined TI DSP/Xilinx Virtex FPGA co-processing system for RMS vibration signal computation. We were responsible for the hardware implementation of the system and also consulted on the algorithms implementation, as well as the design of the analogue signal conditioning circuitry.

For more details , see the Analogue Projects, Embedded Systems project page, the Digital ASIC & FPGA and Mixed Signal projects page for more information.

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Generic DAS/FIR Filter

Project: Configurable FIR digital data acquisition system
Description:
This demonstrator project, designed in VHDL comprised of a multi-tap configurable FIR filter, written using VHDL generics. The system was to be able to digitally filter precision DC signals prior to storage in RAM and post-processing by a downstream CPU/software system.

For more information on our VHDL projects, please visit our Digital ASICs and FPGA projects page.

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Digital Motor Controller Algorithms (Brushed DC Motor)

Project: Digital Brushed DC-motor controller and associated algorithms
Description:
Highly complex digital control system for a brushed DC motor systems containing the DSP algorithms and digital filters and associated technologies, designed in custom VHDL. The company's design expertise involved from system concept through to productionisation of the design. We also provided digitisation of analogue algorithms to the digital domain, analogue design expertise on power circuit driving techniques, interfacing to digital devices.

For more details , see the Embedded Systems project page, the Digital ASIC & FPGA and Mixed Signal projects page for more information.

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